Ineda Systems is a developer of state-of-the-art SOC (systems on a chip) integrated circuits and software. Our foundation technology is a game-changer with the potential to dramatically alter the course of mobile convergence devices with
industry-wide ramifications.
This is a once-in-a-generation opportunity that has come about through a unique confluence of powerful market drivers, the right vision, and the right team being in the right place at the right time.
In the process of getting ready towards the productization of the first generation SOC, Ineda is trying to expand it's R&D; team in Hyderabad, India. Below are the key job openings that are currently open
| Verification Engineer |
| Educational Qualification |
B.Tech. / M.Tech. in EE or equivalent with 5-10 years of experience |
| Experience |
- SA self-motivated senior engineer, responsible for IP/SOC verification
- Experience with AXI/AHB/APB or other standard on-chip buses
- Experience with PCI Express
- Functional knowledge of multi media accelerators (audio, video, security etc.) and peripheral controllers (USB, SATA, Ethernet etc.)
- Verification knowledge of various Low power implementation methodologies
- Excellent debugging skills required
- Hands-on experience with FPGA debug
- Experience with Verilog/PSL/OVA assertions is a plus
- Experience with Specman / System Verilog OVM is a major plus
- Experience with BFMs for stimulus generation, checking and bus monitors
- Prior Experience with post silicon debug
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| SOC Implementation / Synthesis / STA / Engineer |
| Educational Qualification |
SOC Implementation (Synthesis/Timing/Formal Verification) Engineer (Bachelor's or Masters Degree + 3-5 years experience) |
| Experience |
- Experience on multi-million gate design covering Synthesis, Timing analysis and Formal verification on advanced technology nodes 65nm or below.
- In-depth knowledge of synthesis tools (RTL Compiler, Design Compiler)
- In-depth knowledge of Timing Analysis Tools - PrimeTime, PrimeTime SI or equivalent.
- Good proficiency with scripting Languages: Tcl, Perl & gmake.
- Working knowledge of Verilog and VHDL
- Working knowledge of Formal Verification Tools - Conformal, Formality or equivalent.
- Working knowledge of CDC methodologies and tools.
- Working knowledge of DFT Methodologies.
- Working knowledge of physical design tools/flows.
- Working knowledge of UPF/CPF formats for power definitions.
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| SOC Physical Design Engineer |
| Educational Qualification |
Bachelors or Masters Degree in Engineering + 5-10 years experience |
| Experience |
- Senior level physical design engineers with 5-10 years of hands on design experience and have participated in at least 3-4 full chip tapeouts.
- Work experience covering multimillion gate SOC physical implementations from netlist to GDSII on 65nm and below technologies. 45nm/32nm/28nm technology experience preferred.
- Good proficiency in the following sub-areas covering: (expert level proficiency in 1-2 areas is highly advantageous)
- Floor-planning
- Budgeting
- Power delivery and IR analysis
- Clock tree synthesis
- Routing
- Optimization strategies
- Timing analysis and closure activities(including SI & MMMC)
- physical verification
- deep-sub micron effects 65nm and below including OCV, DFM, DFY etc.
- Experience with low power implementation methods and techniques would be helpful.
- Expert level user in at least one of: Cadence, Synopsys, Magma Physical Implementation Tools.
- Moderate to high levels of PERL, TCL, AWK scripting skills.
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| Additional skills |
- Leadership and teamwork
- High levels of motivation and self-discipline
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| ACPI Engineers |
| Educational Qualification |
B.E. / B.Tech. / M.E. / M.Tech. |
| Experience |
- 6+ years of experience in platform level power management
- ACPI complaint system design
- ACPI BIOS and ASL coding & Debugging techniques
- Embedded controller based power management
- Familiar with LPC, SPI, Smbus
- Familiar with PCIe based system design and power management techniques.
- Good understanding on x86 platform power sequencing and power management techniques.
- Strong C and C++ programming skills
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| BIOS Engineers |
| Educational Qualification |
B.E. / B.Tech. / M.E. / M.Tech. |
| Experience |
- 6+ years of experience in BIOS SW development on x86 based platform
- Good knowledge on EFI/UEFI BIOS Framework
- Good understanding on x86 architecture
- Platform level debugging using JTAG based debugger on x86.
- Familiarity with PCIe, SATA, USB and Ethernet controllers
- Strong C and C++ programming skills
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| Windows Driver developers |
| Educational Qualification |
B.E. / B.Tech. / M.E. / M.Tech. |
| Experience |
- 4-10 Years of experience
- Driver Development on Windows
- Expected to have good knowledge on PCIe, USB, SATA, Ethernet driver stack
- Familiarity with WDK, user mode and kernel mode driver framework
- File systems (FAT32, NTFS) and NFS
- Familiarity with client server architectures
- Able to define layered SW architectures
- UEFI BIOS, ACPI knowledge is a big plus
- Exposed to WHQL
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| Linux Driver developers |
| Educational Qualification |
B.E. / B.Tech. / M.E. / M.Tech. |
| Experience |
- 6+ years of experience in system software development
- 3+ years of experience in delivering commercial grade Linux for mobile devices
- Strong C / C++ / Assembly programming, debugging skills
- Experience with board bring-up and one or more device drivers such as audio, video, network, storage and other peripheral device drivers
- Strong knowledge in low level hardware concepts such as ARM processor architecture, PCI configuration, chipset internals, DMA programming, interrupts, ACPI, etc.
- Kernel module development experience and strong knowledge of Linux kernel internals (SMP Schedulers, memory management, IPC, device drivers) is a plus
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| Android Framework Engineers |
| Educational Qualification |
B.E. / B.Tech. / M.E. / M.Tech. |
| Experience |
- 6+ years of experience in developing application software using C/C++/Java
- 3+ years of experience in working with mobile device SDKs
- Strong knowledge in operating system concepts, data structures, OOAD, and familiar with the use of design patterns
- Experience with Android application development and has strong knowledge of Android framework
- Strong knowledge of client side, server side, and communication technologies
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