Leading Edge Silicon, System and Software Company working on Autonomous Driving

IOT Technology

Security is extremely important to protect the system data and user/device credentials and would be a key feature as we move towards connected devices. Ineda offers an enhanced trusted environment both at the H/W and S/W level that is shown by the diagram below. Ineda Architecture supports various levels of security: root of trust, secure keys, secure firmware and application upgrade, secure debug, secure peripherals, secure storage, secure HID, configurable security policies/ACLs, communication/network security etc. Ineda offers easy to use security software with all the required tools, utilities and simple APIs to reduce the time to market for the end product.

In computing systems, virtualization is a technology that is generally implemented to meet the growing demands of user applications. Virtualization allows a platform to run multiple operating systems and applications at the separate partitions of SoCs., thus allowing a computing system to function as multiple “virtual” systems. In addition, each of the virtual systems may be isolated from each other and can function independently.

Lately virtualization has also been extended to cover I/O virtualization. I/O virtualization is a methodology where I/O devices can be shared across multiple hosts. In systems supporting I/O virtualization, address remapping is generally used to enable assignment of the I/O devices to the host processor.

Ineda’s I/O Virtualization technology enables seamless sharing of peripherals such as Display, SD, NAND, Audio, Camera, Wired/Wireless interfaces, among the two or more heterogeneous CPU and OS.

Bringing overall power consumption down to 1/10th of typical power consumed

Ineda’s SoCs are designed for power-sensitive IoT and Automotive applications. There are various design techniques implemented in the Ineda’s SoCs that bring the overall power consumption down to 1/10th of typical power consumed by a Big-Medium-Little-Tiny implementation of processor architecture. These design techniques include:

– Architecture-Level:
> Contributed by Hierarchical computing and I/O virtualization technologies

– Hardware System-Level:
> Power and clock gating, multiple power domains, adaptive power scaling of memory and peripherals.

– Software APIs:
> Power and performance states selection of System, CPU and Peripheral States

> On-demand clocking and frequency scaling controls

The Power states are mainly classified into three categories; Peripheral/Device Power states (denoted as D-states), CPU Power states (denoted as C-states) and the system power states (denoted as S-states). The D-states and C-states are almost similar except for possible H/W event triggered transition from low power states to active states in case of C-states. The system power states control the frequency scaling and power gating for each of the component in the SoC.

A separate power management block inside the Always-ON Sub-system handles clock gating, power gating and frequency scaling. The state selection and control is available as API hooks to the user to build an application algorithmic flow according to his/her power budget.

Highlight of low power architecture and power management block:

  • Separate voltage rails for different hierarchies of CPUs, Memory and associated peripherals.
  • Multiple Power islands within each subsystem driven by independent voltage rates.
  • Capability to Turn-On / Turn-Off SoC Core power rails
  • Controlling the shut-down and power-on sequences (including system reset sequence)
  • Sensor Sub-system Isolation from rest of the core
  • Always-On Sensor IO Pads for un-interrupted usage
  • Sensor On/Off Island power gating
  • Dynamic frequency scaling
  • Coarse grain clock gating for various modules
  • “Halt” instruction clock gating for lowest CPU core

Ultra-low power continuous sensing solution

Many of the advanced context-aware, environment-aware, or location-aware applications rely on growing number of ‘always-on’ sensors. The application and demands for extremely low-power ‘always-on’ sensor technology is going to continue to increase in future.

Indea’s family of SoCs delivers one of industry’s lowest power solution for always-on sensing. It uses a patented IP, called Policy Manager/Task Processing Unit to sense and monitor data continuously from a variety of sensors while keeping the main CPU in deep sleep state. Once configured, the Policy Manager/ Task Processing Unit handles sensing, monitoring and conditioning of sensor data allowing the main CPU to reside in lowest power state. Combined with HCA, the Policy Manager/ Task Processing Unit delivers extreme low power continuous sensing solution enabling a new level of IoT and Automotive “ambient intelligence”.

Delivers low-latency and low overhead communication

New and Emerging applications in Automotive and IoT space needs diversity of processors to deliver the best-in-class elastic performance/power. Any multi-core system is only as effective as the software’s ability to take advantage of parallelism, and ability to effectively map applications needs to individual processors

Ineda’s family of SoCs provides a secure and highly efficient inter-processor communication infrastructure using CPU Link services. The CPU Link is specifically designed to deliver low latency and low overhead communication between processors with diverse performance and memory resources. It uses fast interrupt mechanism to implement low latency for short messages and synchronization. It utilizes shared memory to achieve low overhead (aka “zero-copy”) so data passes by reference rather than physically being copies. Since resources and peripherals are shared between multiple processors, a lightweight semaphore mechanism allows implementation of synchronization primitives to surround critical sections of code and ensure there is no resource contention.

Scale performance, power and resources to meet workload needs

Ineda’s SoCs are built on a powerful new architecture called Hierarchical computing architecture (HCA) that is aimed at improving the power consumption by an order of magnitude while allowing the devices to be in the always-on condition to achieve contextual computing. This HCA allows multiple CPUs to run independently while sharing the onboard resources to offer a unified application experience to the system user. It enables optimal use of CPUs, peripherals, accelerators and memory banks based on use case. Optimal use of resources along with sophisticated on-chip power management leads to a highly elastic power-efficient performance. HCA architecture supported by I/O virtualization allows various peripherals to be shared across the multiple CPUs.

Based on the workload, different portions of the Ineda SoC can be turned ON or OFF. The 4-tiered SoC architecture consists of:

1. Policy Manager: Always-ON Subsystem

2. Task Processing Unit (or TPU): Always-ON Subsystem

3. Microcontroller (or MCU): Simple Applications CPU Subsystem

4. Microprocessor (or MPU): Complex Applications CPU Subsystem

In an example application scenario, the Policy Manager takes care of data acquisition from sensors, and task processing unit takes care of sequencing tasks across multiple sensors and actuators. The MCU manages the actual processing of the local sensor data as well as application interface. The MPU controls richer and complex input/output interfaces like wired/wireless communication, camera/display/media etc., and manages complex software stacks and system applications.

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